Three-Speed Logic is an instrumentation consultancy in Victoria, BC. I design full-stack, FPGA-based scientific instruments, including hardware, firmware, signal processing, high-speed networking, embedded Linux, and Python.

FPGA and RTL design

High-throughput control, readout, and synthesis engines for frequency-domain multiplexed superconducting detectors (TES bolometers and KIDs), and the tooling to build and verify them. Deep AMD/Xilinx expertise, Virtex-4 through UltraScale+ RFSoC.

Signal processing

High-rate, high-fidelity polyphase filter banks (PFBs), FIR/CIC decimator/interpolator chains, and feedback-control systems, designed with open-source tools.

Embedded Linux

Bootloaders, device trees, Buildroot and Yocto images for FPGA/ARM systems, with timely and careful adherence to open-source best practices.

Python control systems

Networked control planes that let a Python session drive C++ code and hardware on the far side of a network.

Networking

UDP Multicast / IGMPv3 streaming, 100GbE, XDP / eBPF kernel bypass, direct-from-RTL and software-mediated dataplanes.

Radiation tolerance

Configuration scrubbing, triple modular redundancy, and a working knowledge of the orbital radiation environment.

Hardware and software I've worked on run at the South Pole Telescope and on the CHIME radio telescope, and have flown at 35 km (117,000 ft.) on a stratospheric balloon. Nothing has made it to space yet, but I'm working on it.

See my work for projects and open-source code, or the notes below for longer write-ups. To get in touch, contact Graeme Smecher by e-mail or on LinkedIn.

Technical Notes

FPGA & Vivado

• Running Vivado in Docker

  Vivado in a Docker container with a bind-mounted installation. Replaces the (obsolete) LXC recipe.

• C/RTL Cosimulation with Vivado and Python

  A method to cosimulate C and RTL code under Python control

• Remote Vivado Builds: More Git, Less Suck

  A hair-shirted remote-build and regression-test framework for Vivado, made of git hooks, worktrees, and tmux.

• Running Vivado in an LXC Container

  Running Vivado in an LXC container for fun and profit (2020; superseded by the Docker recipe)

• XSim's New AXI Analyzer

  Xilinx's simulator can intelligently display AXI in block designs. We want that in RTL too.

Signal Processing

• Designing CIC Compensation Filters

  Designing CIC compensation filters without MATLAB

Python

• Awaitless: asyncio and IPython, without the await

  Teaching asyncio and interactive IPython/Jupyter sessions to get along.

• Tworoutines in Python

  An interesting, and (as it turned out) doomed, method of combining async and synchronous Python code

• Exploring the Orbital Radiation Environment with Python

  A look through the GOES satellite data archive