The ICEboard is a fully custom FPGA / ARM motherboard hosting two high-pin-count (HPC) FPGA Mezzanine (FMC) slots.
The ICEboard, revision 2. The two red mezzanines host high-speed (gigasample per second) ADCs for the CHIME experiment. The motherboard hosts an FPGA and ARM for processing elements, and a variety of high-speed interfaces.
Three-Speed Logic collaborated with McGill's Winterland cosmology lab to design the ICEboard. This board includes:
The ICEboard occupies a 9u-height VME slot (340mm high), although cards are not as deep as a full 9u rack (233mm deep, compared to standard 360mm deep). Most VME crates are adjustable to accommodate this variation; crate vendors are also able to ship correctly sized crates.
Another view of the ICEboard, without FMC daughtercards. The RF shield surrounding the ARM CPU has been removed, exposing two DDR3 ICs and two Ethernet PHYs. The attached programming header is used to configure the board's two PLLs, which are used to generate system clocks for the CPU and FPGA.
The ICEboard is the heart of the ICE hardware and software framework, which builds large arrays of interconnected FPGA-based data acquisition, signal processing and networking nodes economically. Motherboards are specialized through firmware, software, and custom FMC daughterboards. For high-density applications, they are packaged in 16-slot crates whose backplanes implement a passive full-mesh network between boards. A Python control library detects and operates the hardware in the array.
ICE systems include: